Recently, great progress has been achieved in development of semiconductor memory devices such as DRAM (Dynamic Random Access Memory). Due to continuously increasing needs for miniaturized memory devices with mass capacity, integration density of memory cells in a memory device keeps increasing.
In high-density integration, it is advantageous to use two-port devices as memory cells. Particularly, in a matrix addressing memory device, respective memory cells are located at intersections of bit lines and word lines arranged in different directions, respectively. If the memory cell is a two-port device, connection(s) between the memory cell and the bit line and connection(s) between the memory cell and the word line will be simplified, which facilitates the high-density integration.
However, conventional two-port devices, such as phase-change resistors and ferroelectrics, are more or less problematic, e.g., large power requirements or incompatibility with the conventional Si semiconductor process, etc. In view of this, there is a need for a novel two-port semiconductor device which can be used as a memory cell.